
This course introduces basics and fundamentals of digital integrated circuits and particularly CMOS circuits. Course objectives include:
Teaching Load (Fall 2015):
Course work and assesment (out of 100) are as follows:
Lab work: 10 marks
Project: 10 marks
A Midterm exam: 20 marks
A Final Exam: 50 marks
CAD Tools to be used are:
| Lecture 1 | Syllabus and Introcuction | [PDF] , [PDF] |
| Lecture 2 | MOSFET Layout | [PDF] |
| Lecture 3 | Fabrication of MOSFETs | [PDF], [PDF] |
| Lecture 4 | MOSFET Operation | [PDF] |
| Lecture 5 | CMOS Inverter Static Characteristics | [PDF] |
| Lecture 6 | CMOS Inverter Dynamic Characteristics | [PDF] |
| Lecture 7, 8 | CMOS Combinational Circuits | [PDF] |
| Lecture 9, 10 | CMOS Sequential Circuits | [PDF] |
| Lecture 11, 12 | Semiconductor Memories | [PDF] |
| Sheet 1 | CMOS Inverter Static Characteristics | [PDF] |
| Sheet 2 | CMOS Inverter Dynamic Characteristics | [PDF] |
| Sheet 3 | Combinaitonal MOS Circuits | [PDF] |
| Sheet 4 | Sequential CMOS Circuits | [PDF] |
| Sheet 5 | Semiconductor Memories | [PDF] |
| Guide to Tanner EDA | [PDF] | |
| Lab 1 | CMOS Inverter Layout | [PDF] |
| Lab 2 | Static and Dynamic Characteristics of CMOS Inverter | [PDF] |
| Lab 3 | CMOS Combinational Logic Gates | [PDF] |
| Lab 4 | CMOS Sequential Logic Circuits | [PDF] |
| Mid-term Exams | 2015, 2016 |
| Final Exams | 2015 , 2016 |