Electrical Engineering Department
Faculty of Engineering
Alexandria University
CC 322: Computer Architectures
Lecturer: Dr. Mohammed Morsy Farag
Overview
This course introduces basics and fundamentals of the general purpose computer architecture. Course objectives include:
- Get familarize with MIPS Instruction Set Architecture
- Study MIPS Microarchitecture and architectural variations
- Study memory and I/O System for general purpose processors
- Learn Hardware Description Languages to describe the computer architecture
Teaching Load (Spring 2017):
- Lectures (3 hours), Tutorials (1 hours)
- Office Hours: Saturday from 10:30AM to 12:00PM.
- Teaching Assistants: Eng. Fatma Anwar
Course work and assesment (out of 100) are as follows:
-
Homework Assignments:
-
10 marks
-
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5 Labs: Using HDL to design a small MIPS processor
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10 marks
-
-
Project: Design and testing of a simplified MIPS processor [PDF]
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10 marks
-
-
Midterm exam
-
20 marks
-
-
Final Exam
-
50 marks
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CAD Tools to be used are:
- Active HDL Student Edition
- Modelsim Student Edition
Course Outline
- Design Principles associated with modern computer architectures
- RISC Instruction Set Architecture
- MIPS Micro-Architecture
- Memory and I/O System
- Hardware Description Languages
Resources
- Textbook:
- “Digital Design and Computer Architecture”, David Harris, Sarah Harris, 2nd Edition
- Supplementary References:
-
“Computer organization and architecture: designing for performance”. William Stallings, 8th Edition
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Course Materials (2017)
Lectures
| Lecture 1 | Introcuction | [PDF] |
| Lecture 2, 3 | Hardware Description Languages | [PDF] |
| Lectures 4-7 | MIPS Instruction Set Architecture | [PDF] |
| Lecture 8-12 | MIPS Microarchitecture | [PDF] |
| Lecture 13-15 | Memory and I/O Systems | [PDF] |
Sheets
| Sheet 0 | Hardware Description Languages | [PDF] |
| Sheet 1 | MIPS Instruction Set Architecture | [PDF] |
| Sheet 2 | MIPS Micro Architecture | [PDF] |
| Sheet 3 | Memory and I/O Subsystems | [PDF] |
| Review Sheets | on MIPS Microarchitecture and Memory Organization |
[PDF] [PDF] [PDF] |
Lab Assignments
| Lab 1 | 32-Bit ALU and Testbench |
[PDF] [PDF] |
Deadline 16/03/17 |
| Lab 2 | Single Cycle MIPS Processor | [PDF] | 21/04/17 |
| Lab 3 |
Multicycle MIPS
Processor Part I |
[PDF] [PDF] |
04/05/17 |
| Lab 4 (Bonus) |
Multicycle MIPS
Processor Part II |
[PDF] [PDF] |
18/05/17 |
| Project |
Pipelined MIPS Processor (Up to 3 students) |
[PDF] | 06/06/2017 |
Previous Exams
| Mid-term Exams | 2016 , 2017 |
| Final Exams | 2016 |