Electrical Engineering Department
Faculty of Engineering
Alexandria University
CS x35: Computer Architectures
Lecturer: Dr. Mohammed Morsy Farag
Overview
This course introduces basics and fundamentals of general purpose and application-specific computer architectures. Course objectives include:
- Get familarize with MIPS Instruction Set Architecture
- Study MIPS Microarchitecture and architectural variations
- Study memory and I/O System for general purpose processors
- Investigate Hardware, DSP, and Application Specific Computing Architectures
- Learn Hardware Description Languages to describe computing architectures
Teaching Load (Spring 2013):
- Lectures (3 hours), Tutorials (2 hours), Lab (2 hours)
- Office Hours: Saturday from 11:30AM to 2:00PM.
- Teaching Assistant: Eng. Khalid Essam
Course work and assesment (out of 125) are as follows:
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5 Labs: Using HDL to design a simplified processor
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Lab work: 10 marks
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Attendance: 5 marks
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A Project: Design and testing of various processor architectures using HDL (10 marks)
- Read this file [PDF] for the project details.
- Teams are allowed (the maximum number of team members is three)
- The project is graded out of 10 and the submission deadline is 20/5/2015. You should submit the project files to the course TAs by the deadline.
- An optional project is offered to get a bonus of 10 marks that can be added to your year work. Read this file [PDF] for the optional project details.
- For both projects you are requirred to submit a report summarizing your work and the project design files compressed in a zipped file.
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A Midterm exam: 25 marks
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A Final Exam: 75 marks
CAD Tools to be used are:
- Xilinx ISE: http://xilinx.com/
- Active HDL Student Edition https://www.aldec.com/en/products/fpga_simulation/active_hdl_student
- Modelsim Student Edition https://www.mentor.com/company/higher_ed/modelsim-student-edition
Course Outline
- MIPS Instruction Set Architecture
- MIPS Micro-Architecture
- Memory and I/O System
- Hardware, DSP, and Application Specific Computing Architectures
- Hardware Description Languages
Resources
- Textbook:
- “Digital Design and Computer Architecture”, David Harris, Sarah Harris, 2nd Edition
- “DSP Architecture Design Essentials”, Dejan Markovic, Robert Brodersen
- Supplementary References:
- “Computer Organization and Design”, David Patterson, John Hennessy, 4th Edition
Lectures
| Lecture 1 | Syllabus and Introcuction | [PDF] |
| Lecture 2, 3, 4 | MIPS Instruction Set Architecture | [PDF] |
| Lecture 5, 6, 7 | Hardware Description Languages | [PDF] |
| Lecture 8, 9, 10 | MIPS Microarchitecture | [PDF] |
| Lecture 11, 12 | Memory and I/O Systems | [PDF] |
| Lecture 13-16 | From Algorithms to Architectures | [PDF] |
Sheets
| Sheet 1 | MIPS Instruction Set Architecture | [PDF] |
| Sheet 2 | MIPS Micro Architecture | [PDF] |
| Sheet 3 | Memory and I/O Subsystems | [PDF] |
| Sheet 4 | From Algorithms to Architectures | [PDF] |
Lab Assignments
| Lab 1 | 32-Bit ALU and Testbench |
[PDF] [PDF] |
| Lab 2 | Single Cycle MIPS Processor | [PDF] |
| Lab 3 | Multicycle MIPS
Processor Part I |
[PDF] [PDF] |
| Lab 4 | Multicycle MIPS
Processor Part II |
[PDF] [PDF] |
Previous Exams
| Mid-term Exams | 2015, 2016, 2017 |
| Final Exams | 2015 , 2016, 2017 |